This invention relates to an an electrically controllable oscillator circuit (VCO), comprising:
a first (G1) and a second (G2) balanced transconductance circuit, each having a non-inverting (Vi+) and an inverting (Vi-) input terminal, a non-inverting (Vo+) and an inverting (Vo-) output terminal, a first (Vd1) and a second (Vd2) power-supply terminal and a signal ground terminal (E), PA1 the non-inverting input terminal (Vi+) of the first transconductance circuit (G1) being connected to the inverting output terminal (Vo-) of the second transconductance circuit (G2), the inverting input terminal (Vi-) of the first transconductance circuit (G1) being connected to the non-inverting output terminal (Vo+) of the second transconductance circuit (G2), the non-inverting output terminal (Vo+) of the first transconductance circuit (G1) being connected to the non-inverting input terminal (Vi+) of the second transconductance circuit (G2), and the inverting output terminal (Vo-) of the first transconductance circuit (G1) being connected to the inverting input terminal (Vi-) of the second transconductance circuit (G2), PA1 the first power-supply terminals (Vd1) of the two transconductance circuits (G1, G2) being interconnected and constituting a first control-signal terminal (Vdd1), the second power-supply terminals (Vd2) of the two transconductance circuits (G1, G2) being interconnected and constituting a second control-signal terminal (Vdd2), and the signal ground terminals (E) of the two transconductance circuits (G1, G2) being connected to the signal ground of the oscillator circuit (VCO), PA1 first (C1) and second (C2) capacitive means being connected to the output terminals (Vo+, Vo-) of the first (G1) and the second (G2) transconductance circuit, respectively, during operation, PA1 the first (G1) and the second (G2) transconductance circuit each comprising a first (Inv1), a second (Inv2), a third (Inv3) and a fourth (Inv4) transistor pair of a first type and a fifth (Inv5) and a sixth (Inv6) transistor pair of a second type, each having an input and an output electrode, a power-supply electrode and a signal ground electrode, PA1 the input electrode of the first transistor pair (Inv1) being connected to the non-inverting input terminal (Vi+) and the input electrode of the second transistor pair (Inv2) to the inverting input terminal (Vi-), the output electrode of the first transistor pair (Inv1) being connected to the inverting output terminal (Vo-) and the output electrode of the second transistor pair (Inv2) to the non-inverting output terminal (Vo+), the input electrode of the third transistor pair (Inv3) being connected to the output electrode of the first transistor pair (Inv1) and the input electrode of the fifth transistor pair (Inv5) to the output electrode of the second transistor pair (Inv2), said third (Inv3) and said fifth (Inv5) transistor pair having their output electrodes interconnected, the input electrode of the fourth transistor pair (Inv4) being connected to the output electrode of the second transistor pair (Inv2) and the input electrode of the sixth (Inv6) transistor pair to the output electrode of the first transistor pair (Inv1), said fourth (Inv4) and said sixth (Inv6) transistor pair having their output electrodes interconnected, and PA1 the power-supply electrodes of the first (Inv1), the second (Inv2), the third (Inv3) and the fourth (Inv4) transistor pair being connected to the first power-supply terminal (Vd1), the power-supply electrodes of the fifth (Inv5) and the sixth (Inv6) transistor pair being connected to the second power-supply terminal (Vd2), and the signal ground electrodes of the transistor pairs being connected to the signal ground terminal (E) of the transconductance circuit (G1, G2), PA1 a transistor pair of the first type (Inv1, Inv2, Inv3, Inv4) comprising two complementary transistors (Tn, Tp) whose main current paths are arranged in series via a connecting point forming the output electrode and whose control electrodes are interconnected to form the input electrode, said series arrangement having end points constituting the power-supply electrode and the signal ground electrode, respectively, in a way such that in operation the transistors can operate in their saturation regions, and PA1 a transistor pair of the second type (Inv5, Inv6) of a structure similar to a transistor pair of the first type (Inv1, Inv2, Inv3, Inv4) whose input and output electrodes are interconnected. PA1 a seventh transistor pair (Inv7) of a third type, whose circuit structure corresponds to that of the transistor pair (Inv5, Inv6) of the second type and in which the active dimensions of the transistors (Tn, Tp) correspond to those of the corresponding transistors (Tn, Tp) of a transistor pair (Inv1, Inv2, Inv3, Inv4) of the first type, PA1 said seventh transistor pair (Inv7) having its power-supply electrode connected to the second control-signal terminal (Vdd2) and its signal ground electrode to the signal ground of the oscillator circuit (VCO), and having its output electrode connected to the control electrodes of a differential transistor pair (Dif) via first (Vb1) and second (Vb2) direct voltage sources of opposite polarity, PA1 the main current paths of the transistors (T1, T2) of said differential pair (Dif) being arranged in parallel between the second control-signal terminal (Vdd2) and an input (32) of a first current mirror circuit (IM1) having a supply terminal connected to signal ground, PA1 which first current mirror circuit (IM1) has an output (33) connected to an input (34) of a second current mirror circuit (IM2), which second current mirror circuit (IM2) has a separate power-supply terminal (36), the first control-signal terminal (Vdd1) of the oscillator circuit (VCO) being connected to an output (35) of said second current mirror circuit (IM2).
An oscillator circuit comprising two coupled balanced input, single output transconductance circuits, each loaded with a capacitor, is known from U.S. Pat. No. 4,760,353. The transconductance circuits themselves are described in "Linear CMOS Transconductance Element for VHF Filters" by B. Nauta and E. Seevinck, Electronic Letters, Vol. 25, no. 7, Mar. 30, 1989, pp. 448-450.
In practice, transconductance circuits are employed inter alia as electronic equivalents for inductances such as coils. Analog filter arrangements comprising transconductance circuits can be constructed advantageously as integrated semiconductor circuits, to which the required capacitors can be added separately or in which said capcitors can be incorporated directly in the substrate of the semiconductor circuits themselves.
An analog filter arrangement comprising transconductance circuits with transistor pairs as mentioned in the foregoing is described in "A 110 MHz CMOS Transconductance-C Low-Pass Filter" by B. Nauta and E. Seevinck, Digest of Technical Papers ESSCIRC, 89, Vienna, Sep. 20-22, 1989, pp. 141-144.
Since the frequency parameters of these active filters are determined mainly by the components of the transconductance circuits and the capacitors, accurate exactly dimensioned component values should be employed for this purpose. As these are generally not available or only at high cost, it is necessary for the filters to be adjustable. In fully integrated filter arrangements, in which for example all the components are formed in a silicon substrate, an electronic adjustment facility should be provided. Since the fabrication of integrated semiconductor circuits is subject to tolerances and the values of the components used can change as a result of aging and temperature fluctuations, manual adjustment of filter parameters is generally not possible or is not accurate enough. For this reason an automatic adjustment is to be preferred.
For the adjustment or correction of the filter parameters it is necessary to measure the instantaneous filter parameters to compare these parameters with the desired filter action, to determine a possible deviation and when necessary to perform a correction to reduce such a deviation.
British Patent Application 2,194,402 reveals a method employed in practice, in which the response to a reference signal is determined. In the case that a deviation is detected the required corrections are applied via a suitable control circuit. Instead of subjecting the filter itself to the reference signal an auxiliary circuit is used which is identical or substantially identical to the filter. The correction signal generated for this auxiliary circuit is employed for correcting the filter response. Such a system is also referred to as a "master slave system", the auxiliary circuit being the "master" and the filter being "the slave".
The article "Design of continuous-time fully integrated filters: a review", by F. Schaumann, IEEE - Proceedings. vol 136, Pt. G, no. 4, August 1989, pp. 184-190 describes inter alia a master slave system in which the master is a voltage-controlled oscillator circuit (VCO). This VCO comprises a representative sub-structure of the filter (the slave).
The frequency response of, for example, an integrated active filter is generally corrected by adjusting the cut-off frequency (f-tuning) and/or the quality factor (Q-tuning). A change in the f-tuning generally also results in a change in the quality factor of the filter circuit, which may manifest itself in an undesirable change in the amplitude of the filter response, which requires correction of the Q-tuning. In general, two separate control circuits are employed for the f-tuning and the Q-tuning.